1. Field of the Invention
The invention relates to the technology of semiconductor, and particularly to a semiconductor device and a manufacturing method of the same. More particularly, it relates to a manufacturing method of a gate stack with sacrificial oxygen-scavenging metal spacers, and a semiconductor device with a gate stack structure manufactured by the method.
2. Description of the Prior Art
Conventional Complementary Metal Oxide Semiconductor Field Effect Transistor (CMOSFET) manufacturing process comprises Gate-First process and Gate-Last process. High-dielectric-constant (high-K) dielectric/metal gate electrode stacks with Low equivalent oxide thickness (EOT) are widely used in 32 nm technology node and beyond. An interfacial layer between the high-K dielectric and the substrate channel (usually a semiconductor substrate) makes it very difficult to achieve EOT<1 nm, because the interfacial layer itself could account for about 4 Å thickness. In the conventional CMOSFET process, a sacrificial metal layer such as Ta, Ti and the like between the high-K dielectric and the metal gate electrode has been used to scavenge the oxygen within the dielectric film. The gate stack structure with low EOT has been achieved using this method.
FIG. 1 shows a schematic view of the semiconductor device manufactured by the conventional Gate-First process. As shown in FIG. 1, the semiconductor device manufactured by the conventional process mainly comprises: a semiconductor substrate 100, a shallow trench isolation (STI) 110, an interfacial oxide layer 120, a high-K dielectric layer 130, a sacrificial oxygen-scavenging metal layer 140, and a metal gate electrode 150. The STI 110 is formed in the semiconductor substrate 100 for isolation between devices. The interfacial oxide layer 120 is formed on the semiconductor substrate 100. The high-K dielectric layer 130 is formed on the interfacial oxide layer 120. The sacrificial oxygen-scavenging metal layer 140 is formed on the high-K dielectric layer 130. The metal gate electrode 150 is formed on the sacrificial oxygen-scavenging metal layer 140. Thereby, the interfacial oxide layer 120, the high-K dielectric layer 130, the sacrificial oxygen-scavenging metal layer 140, and the metal gate electrode 150 form the gate stack structure of the semiconductor device. In the semiconductor device shown in FIG. 1, the sacrificial oxygen-scavenging metal layer 140 is between the high-K dielectric layer 130 and the metal gate electrode 150. After annealing and/or other processing steps, the sacrificial oxygen-scavenging metal layer 140 will scavenge the oxygen in the high-K dielectric layer 130 and convert to metal oxide dielectric. The purpose of disposing the sacrificial oxygen-scavenging metal layer 140 is to consume the oxygen in the gate stack structure, thus reducing the oxygen to be consumed by the substrate. In this way, the EOT could be minimized.
However, both the Gate-First process and the Gate-Last process as the conventional CMOSFET manufacturing process have the following disadvantages:                1. The sacrificial metal layer (the sacrificial oxygen-scavenging metal layer 140) becomes a metal oxide layer (dielectric layer) after the oxygen within the dielectric layer (the high-K dielectric layer 130) is scavenged by the sacrificial metal layer. This converted dielectric layer will be accounted for the new EOT increase and thereby small EOT is hard to achieve.        2. The sacrificial metal layer might not be fully converted into metal oxide dielectric (dielectric layer) if, for example, oxygen is not enough for the complete conversion of the sacrificial metal layer. This could result in thickness variation for the metal oxide (dielectric layer), and thereby variation of work functions for different devices.        